input register
英 [ˈɪnpʊt ˈredʒɪstə(r)]
美 [ˈɪnpʊt ˈredʒɪstər]
网络 输入寄存器; 寄存器; 输入级寄存器; 输入缓存器; 输入暂存器
双语例句
- Thus% eax serves here as both input and output register.
这样，这里的%eax既可以用作输入寄存器，又可以用作输出寄存器。 - If y were specified in the input section, the value of y on stack would not be updated, even though it does get updated in the temporary register storage of y (% edx).
如果y是在输入部分中指定的，那么即使它在y的临时寄存器存储值（%edx）中被更新，堆栈上y的值也不会更新。 - Both input x and output y were allocated in the same% edx register, assuming that inputs are consumed before outputs are produced.
输入x和输出y都分配在同一个%edx寄存器中，假设输入在输出产生之前被消耗。 - The type of Modbus register being addressed ( input, hold, coil, status).
正被寻址的Modbus寄存器的类型（input、hold、coil、status）。 - In the following example, the cpuid instruction takes the input in the% eax register and gives output in four registers:% eax,% ebx,% ecx,% edx.
在下面的示例中，cpuid指令采用%eax寄存器中的输入，然后在四个寄存器中给出输出：%eax、%ebx、%ecx、%edx。 - The Influence of Grammatical Metaphor Input and Its Inadequacy on the Awareness of Register in Chinese EFL Learners
论语法隐喻的输入与缺失对二语语域意识的影响 - Input/ output interrupt request register
输入输出中断请求寄存器 - By analyzing the control of AD sampling sequence, a sampling system is designed, in which the sampling rate is decided by the input square-wave frequency and the sampling channel number is set by a register in CPLD.
结合分析AD采样时序的控制，设计出了采样频率由输入方波频率决定，采样通道数由CPLD寄存器设定的采样系统。 - It comprises of four basic unit: input delay, filter, register bank, and control unit.
这种结构由四部分构成：输入延迟单元、寄存器单元、滤波器单元和控制单元。 - This paper discusses the ways of improving the register in the National Computer Rank Examination ( Abbreviated to NCRE) by using the data input function of the NCRE register software.
本文主要研究如何充分利用全国计算机等级考试（简称NCRE）报名软件的数据导入功能，改进报名方式。 - This scheme consists no quantum input, output and quantum register, even unitary gates from some universal sets are not necessary.
一次性的量子计算机没有量子输入，量子输出，量子寄存器，也不包含量子门。 - Based on the jointed test action group ( JTAG) protocol, instructions and scan chain were introduced. With test access port ( TAP) module exchanging serial input with parallel output, register files and random access memory on chip were read or written in parallel.
在JTAG接口协议的基础上，增加指令和扫描链，同时通过测试访问端（TAP）控制把串行输入转换成并行输出，并行访问数字信号处理器的寄存器文件和片上存储器单元，实现嵌入式模拟器。 - Among them, several functions such as student information management, input of academic achievement, inquiry, modification, printing, ranking of students and placement tests, register of record files, auditing and management, examination of graduation and academic degree are especially emphasized.
重点实现了对学生基本信息的管理，学习成绩的录入、查询、修改、打印、批量导、排名和分级考试，学籍档案的注册、审核和管理，毕业和学位审核等功能。